Abstract

The thesis initially investigates the history of the monolithic ADCs. The next chapter explores the different types of ADCs available in the market today. Next, the operation of a 4-bit SAR ADC has been studied. Based on this analysis, an 8-bit charge-redistribution SAR ADC has been designed and simulated with Multisim (National Instruments, Austin, TX). The design is divided into different blocks which are individually implemented and tested. Level-1 SPICE MOSFET models representative of 5μm devices were used wherever individual MOSFETs were used in the design. Finally, the power dissipation during the conversion period was also estimated. The supply voltage for the ADC is 5V and the clock frequency is 500KHz.

Date of publication

Fall 11-28-2017

Document Type

Thesis

Language

english

Persistent identifier

http://hdl.handle.net/10950/618

Committee members

Dr. David Beams, Dr. Mukul Shirvaikar, Dr. Ron Pieper

Degree

Master of Science in Electrical Engineering

Share

COinS