Abstract
In this paper, an optimized memristor emulator circuit is designed, by using nine MOSFET transistors and a ground capacitor. Our area- and power-optimized emulator circuit can be used for basic data storage and processing at the monitoring edge, in real-time applications. The memristor shows a nonlinear voltage–current relationship, but no multiplier circuit provides the memristor's nonlinear characteristics. As a result, the proposed memristor emulator has a very low chip area. The memristor circuit is designed in LTSpice, using 16 nm and 45 nm CMOS technology parameters, and the operating voltage is ±0.9 V. In this research, the theoretical derivations are validated using the simulated results of the memristor emulator circuit using different frequencies, capacitors, and input voltages in SPICE simulations.
Description
Copyright: 2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
Publisher
MDPI
Date of publication
3-31-2023
Language
english
Persistent identifier
http://hdl.handle.net/10950/5003
Document Type
Article
Recommended Citation
Ghosh, Prosenjit Kumar; Riam, Shah Zayed; Ahmed, Md Sharif; and Sundaravadivel, Prabha, "CMOS-Based Memristor Emulator Circuits for Low-Power Edge-Computing Applications" (2023). Electrical Engineering Faculty Publications and Presentations. Paper 25.
http://hdl.handle.net/10950/5003